Authors
Theo Soriano, David Novo, Pascal Benoit
Publication date
2021/10/14
Conference
2021 IEEE International Workshop on Rapid System Prototyping (RSP)
Pages
8-14
Publisher
IEEE
Description
Recent advances in machine learning have made it possible to consider the implementation of smart applications in constrained systems at the edge of the network. These memory and Central Processing Unit (CPU) intensive applications may require specific exploration methodologies to design efficient node computing devices. To better guide and validate these explorations, we need to perform energy and performance evaluations of the system. Software-based evaluation tools are application-oriented and do not consider real-time and hardware constraints. Alternatively, hardware prototyping allows an accurate and real-time evaluation but offers limited flexibility and does not allow agile design exploration of the microcontroller unit (MCU). In this work, we propose a Field Programmable Gate Arrays (FPGA) based edge computing node emulation platform. Our solution combines the flexibility and the real-time …
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Scholar articles
T Soriano, D Novo, P Benoit - 2021 IEEE International Workshop on Rapid System …, 2021