Authors
Montek Singh, Jose A Tierno, Alexander Rylyakov, Sergey Rylov, Steven M Nowick
Publication date
2009/10/9
Journal
IEEE transactions on very large scale integration (VLSI) systems
Volume
18
Issue
7
Pages
1043-1056
Publisher
IEEE
Description
A high-throughput low-latency digital finite impulse response (FIR) filter has been designed for use in partial-response maximum-likelihood (PRML) read channels of modern disk drives. The filter is a hybrid synchronous-asynchronous design. The speed-critical portion of the filter is designed as a high-performance asynchronous pipeline sandwiched between synchronous input and output portions, making it possible for the entire filter to be embedded within a clocked system. A novel feature of the filter is that the degree of pipelining is dynamically variable, depending upon the input data rate. This feature is critical in obtaining a very low filter latency throughout the range of operating frequencies. The filter is a ten-tap six-bit FIR filter, fabricated in a 0.18-μm CMOS process. Resulting chips were fully functional over a wide range of supply voltages, and exhibited throughputs of over 1.3 giga-items/s, and latencies of …
Total citations
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Scholar articles
M Singh, JA Tierno, A Rylyakov, S Rylov, SM Nowick - IEEE transactions on very large scale integration (VLSI) …, 2009