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A major design issue for the next generation routers is the IP lookup mechanism. The router needs to perform a longest prefix matching on the address lookup for each incoming packet to determine the next hop. Currently, the process is done in software and has become a major performance bottleneck of the router. We propose a fast IP lookup mechanism in which the forwarding table is small enough to fit in an SRAM with very low cost. It also can be implemented in hardware using the pipeline technique. A large routing table with 45,000 routing prefixes can be compressed to a forwarding table with about 430 kbytes in sine by using our proposed method. In the worst case, the number of memory accesses for a lookup is three. When implemented in pipeline technique, the proposed mechanism can achieve one routing lookup per memory access. With current 10 ns SRAM, this mechanism provides approximately …