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2. Background Art In the manufacture of semiconductor integrated cir cuits, there has always been a loss of chip yield from finished wafers due to various defects, which result in chip failure. One class of defects is known as a system atic defect, observed at the wafer level in recurring spatial patterns of chip failures. Systematic errors can be traced to specific causes. A second class of defects, known as a random defect, cannot be associated with a particular cause for any individual failure. Collectively, the cause of random defects can sometimes be deter mined experimentally. The present invention is con cerned with the latter class of defects occurring during the manufacturing steps of integrated circuit fabrica tion.

When integrated circuits and wafers were simple, meaning that the layering processes of circuit manufac ture could be accomplished in a few days or even a week, random defects could be spotted by …