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The fast-moving field of Neural Network (NN) research has brought breakthroughs in application domains like image or natural language processing. However, since new techniques are constantly emerging, fast prototyping of Neural Networks on edge devices like Field-Programmable Gate Arrays (FPGAs) is particularly appealing due to their reconfigurability. Existing compiler-based toolchains generating specialized hardware are rare and restricted in their scope and coverage. In this paper, we propose a novelNNmodel-to-hardware flowthat exploits the capabilities of Application-Specific Instruction Set Processors (ASIPs) and networks that can be built to implement NNs in a scalable and mixed hardware/software-reconfigurable way. Starting with an NN specification in PyTorch, an ASIP network generation toolchain is presented in which each instantiated core is assigned a portion of neurons to execute a given …