Authors
Paolo Burgio, Andrea Marongiu, Paolo Valente, Marko Bertogna
Publication date
2015/10/7
Conference
2015 CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST)
Pages
1-8
Publisher
IEEE
Description
There is an increasing interest among real-time systems architects for multi- and many-core accelerated platforms. The main obstacle towards the adoption of such devices within industrial settings is related to the difficulties in tightly estimating the multiple interferences that may arise among the parallel components of the system. This in particular concerns concurrent accesses to shared memory and communication resources. Existing worst-case execution time analyses are extremely pessimistic, especially when adopted for systems composed of hundreds-tothousands of cores. This significantly limits the potential for the adoption of these platforms in real-time systems. In this paper, we study how the predictable execution model (PREM), a memory-aware approach to enable timing-predictability in realtime systems, can be successfully adopted on multi- and manycore heterogeneous platforms. Using a state-of-the …
Total citations
2016201720182019202020212022202348485222
Scholar articles
P Burgio, A Marongiu, P Valente, M Bertogna - 2015 CSI Symposium on Real-Time and Embedded …, 2015