Authors
Jonathan E Proesel, Zeynep Toprak-Deniz, Alessandro Cevrero, Ilter Ozkaya, Seongwon Kim, Daniel M Kuchta, Sungjae Lee, Sergey V Rylov, Herschel Ainspan, Timothy O Dickson, John F Bulzacchelli, Mounir Meghelli
Publication date
2017/12/28
Journal
IEEE Journal of Solid-State Circuits
Volume
53
Issue
4
Pages
1214-1226
Publisher
IEEE
Description
This paper presents a 32 Gb/s non-return-to-zero optical link using 850-nm vertical-cavity surface-emitting laser-based multi-mode optics with 14-nm bulk FinFET CMOS circuits. The target application is the integration of optics on to the first-level package, connecting high-speed optical I/O directly to an advanced CMOS host chip (e.g., processor and switch) to increase package I/O bandwidth density and lower overall system power and cost. The optical link is designed for maximum link margin to tolerate high optical losses created by low-cost optical packaging. The transmitter (TX) uses a three-tap, 1/2-unit-interval-spaced feed-forward equalizer to improve eye opening. The receiver (RX) uses a low-bandwidth, low-noise transimpedance amplifier and a speculative one-tap decision-feedback equalizer for high sensitivity. The TX and RX power efficiencies are 3.3 and 1.4 pJ/bit, respectively. The TX optical …
Total citations
20172018201920202021202220232024112107161371
Scholar articles
JE Proesel, Z Toprak-Deniz, A Cevrero, I Ozkaya… - IEEE Journal of Solid-State Circuits, 2017