Authors
Zeynep Toprak-Deniz, Jonathan E Proesel, John F Bulzacchelli, Herschel A Ainspan, Timothy O Dickson, Michael P Beakes, Mounir Meghelli
Publication date
2019/9/25
Journal
IEEE Journal of Solid-State Circuits
Volume
55
Issue
1
Pages
19-26
Publisher
IEEE
Description
This article describes a 128-Gb/s pulse amplitude-modulation 4-level (PAM-4) transmitter (TX) implemented in a 14-nm CMOS FinFET technology. Equalization is provided by a fully reconfigurable 3-tap baud-spaced feed-forward equalizer (FFE). The TX uses a segmented tailless current mode logic (CML) driver topology. The key architectural and circuit techniques include the thermometer-encoded driver slices, the clock phase selection circuits to perform segment reassignment to different FFE taps, and coarse–fine tuning of the FFE tap weights. The measured energy efficiencies for PAM-4 signaling are 1.33 pJ/b at 128 Gb/s with 1-V ppd output amplitude and 1.0 pJ/b at 112 Gb/s with 0.6-V ppd output amplitude. These results represent the highest data rate and best energy efficiencies reported to date.
Total citations
201920202021202220232024515188911
Scholar articles
Z Toprak-Deniz, JE Proesel, JF Bulzacchelli… - IEEE Journal of Solid-State Circuits, 2019