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An important conclusion of the Belle SVD/CDC Task Force1 is that the upgraded SVD should provide Level 1 trigger information. This information will be used to select events with z vertices close to the nominal IP. One way to accomplish this is to add discriminators to the VA chips, whose outputs could then be used to form a trigger signal. This approach is straightforward in principle, but involves development of a new chip (the\VATA"). Although chips similar to this have been successfully produced by IDEAS already, the deployment of the VATA represents a departure from our existing philosophy of having no active digital lines prior to the receipt of the Level 1 trigger. In this note I propose an alternate strategy for implementing a z-vertex trigger that uses information extracted from the external readout electronics during the analog scan. This approach makes use of existing 0.35 μm VA1 chips2 and does not require …