Design of Low Power SRAM using Hierarchical Divided Bit-line Approach in 180-nm Technology
Authors
Mohammed Sayeeduddin Habeeb Mohd Salahuddin
Publication date
2016/2
Source
https://www.researchgate.net/publication/294732072_Design_of_Low_Power_SRAM_using_Hierarchical_Divided_Bit-line_Approach_in_180-nm_Technology