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Within the past decade, neural networks have become the state-ofthe-art algorithms for many computer vision applications, utilizing machine learning approaches to model the underlying complex data analysis tasks. The proliferation of miniaturized and smart sensing devices, exploiting neural networks in battery-powered wearables and internet-of-things (IoT) applications, introduced the need for energyefficient machine learning hardware accelerators. These systems can analyze data directly on board, so-called edge processing, enabling to preserve privacy and reduce latency as well as processing energy, compared to external data analysis using cloud computing. This thesis investigates multiple optimization approaches to improve the efficiency of edge processing devices and expand their range of applications. It first provides an overview and quantitative comparison of existing optimization techniques, illustrating their broad range, from low-level hardware optimizations up to high-level algorithm codesign and mapping improvements. We then evaluate edge processing capabilities on high-speed cameras, enabling to reduce power consumption by 3×, and provide a tool for automated mapping of trained networks to ease the efficient implementation on cameras with programmable logic. We further propose an efficient memory allocation technique for convolutional neural network (CNN) accelerators, enabling memory savings of up to 48.8% compared to traditional mapping. To equip even tiny edge processing devices with machine learning-based data analysis capabilities, the strict power constraints imposed by their limited battery …