Authors
Hoi Lee, Philip KT Mok
Publication date
2003/3/10
Journal
IEEE Journal of Solid-State Circuits
Volume
38
Issue
3
Pages
511-520
Publisher
IEEE
Description
An active-feedback frequency-compensation (AFFC) technique for low-power operational amplifiers is presented in this paper. With an active-feedback mechanism, a high-speed block separates the low-frequency high-gain path and high-frequency signal path such that high gain and wide bandwidth can be achieved simultaneously in the AFFC amplifier. The gain stage in the active-feedback network also reduces the size of the compensation capacitors such that the overall chip area of the amplifier becomes smaller and the slew rate is improved. Furthermore, the presence of a left-half-plane zero in the proposed AFFC topology improves the stability and settling behavior of the amplifier. Three-stage amplifiers based on AFFC and nested-Miller compensation (NMC) techniques have been implemented by a commercial 0.8-μm CMOS process. When driving a 120-pF capacitive load, the AFFC amplifier achieves over …
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