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The static power has become a critical issue during SoC power optimization in nanoscale technology. To deal with this, SoCs can be partitioned into multiple power domains, and each of them can be power gated individually to achieve fine-grain system-level power management. However, inappropriate power domain partitioning or inappropriate dynamic power management policies (DPMPs) may end up raising the overall energy consumption and impose unacceptable design costs of SoCs. This paper proposes a design methodology for automatically partitioning an application-specific SoC into multiple power domains at the system level and generating an appropriate DPMP taking into account the application behavior. Simulation results show about 45% savings of the overall system energy consumption for an industrial design case of Voice over LTE (VoLTE). In addition, using a meta-heuristic multipleobjective evolutionary algorithm, the obtained partitioning options can guide system architects to easily trade off energy savings and other power gating design constraints.