Authors
Menglian Zhao, Yibo Zhao, Huajun Zhang, Yaopeng Hu, Yuanxin Bao, Le Ye, Wanyuan Qu, Zhichao Tan
Publication date
2021/11/9
Journal
IEEE Journal of Solid-State Circuits
Volume
57
Issue
3
Pages
709-718
Publisher
IEEE
Description
This article presents a fully dynamic scalable switched-capacitor delta–sigma modulator that achieves a 94.1-dB dynamic range (DR). Power-and- bandwidth scalability by only changing the clock frequency is achieved using a capacitively biased and swing-enhanced floating inverter operational transconductance amplifier (OTA). Fabricated in a 180-nm CMOS process, the prototype achieves an signal-to-noise-and-distortion ratio (SNDR) of >87 dB across scaling from 100 to 400 kHz of the sampling frequency . At 200-kHz , it achieves an SNDR/DR of 89.3/94.1 dB while consuming , leading to a DR-based Schreier figure of merit (FoM) of 177.1 dB.
Total citations
202220232024278
Scholar articles
M Zhao, Y Zhao, H Zhang, Y Hu, Y Bao, L Ye, W Qu… - IEEE Journal of Solid-State Circuits, 2021