View article

The authors describe a method to find RC models for (nonorthogonal) interconnections in VLSI layouts, including resistances as well as ground and coupling capacitances. The method starts with the construction of a finite-element mesh for the interconnection polygons. Resistances are assigned to the edges of the mesh, and capacitances to the vertices. Then, all internal nodes are eliminated by a novel and efficient node-reduction algorithm. This algorithm preserves the Elmore time constants between the remaining nodes, without actually computing them. The resulting network accurately reflects the electrical properties of the distributed RC interconnections, and can efficiently be simulated.< >