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The need for more scalability in design on one hand and the occurrence of latency and high power consumption in communications between distant cores on the other hand are considered as the most common challenges which networks on chip encounter. Today, wireless network on chip (WiNoC) is regarded as a novel proposed approach in which wireless links are shortcuts for the fast data transmission between distant cores. However, the presence of Wireless routers (WRs) in WiNoC increases the cost and area. Thus, finding an optimal structure for communicating between cores is essential. In this paper, genetic algorithm (GA) and simulated annealing (SA) are compared with each other under different traffic patterns to find the best positions of WRs. The results obtained from the simulations of this study indicate that GA has higher efficiency than SA. Furthermore, the resulting structure has fewer WRs …