Inventors
Arnon Amir, Pallab Datta, Nimrod Megiddo, Dharmendra S Modha
Publication date
2023/2/21
Patent office
US
Patent number
11586893
Application number
16834311
Description
Core utilization optimization by dividing computational blocks across neurosynaptic cores is provided. In some embodiments, a neural network description describing a neural network is read. The neural network comprises a plurality of functional units on a plurality of cores. A functional unit is selected from the plurality of functional units. The functional unit is divided into a plurality of subunits. The plurality of subunits are connected to the neural network in place of the functional unit. The plurality of functional units and the plurality of subunits are reallocated between the plurality of cores. One or more unused cores are removed from the plurality of cores. An optimized neural network description is written based on the realloca-tion.
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