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In this paper the processing power of an IC is analyzed as function of supply voltage, transistor threshold voltages and amount of pipelining. It is described how the above mentioned parameters can be optimized for submicron CMOS VLSI systems. The maximum allowed power dissipation and the sub-threshold leakage currents are identified as the main limiting factors for the increase of processing power. It is shown that the useful IC operating frequency will eventually reach a maximum.