Authors
Robert J Sluyter, PJ Snijder, H Dijkstra, CM Huizer, Arthur HM van Roermund
Publication date
1989/5/23
Conference
International Conference on Acoustics, Speech, and Signal Processing,
Pages
2476-2479
Publisher
IEEE
Description
A description is given of a digital, general-purpose, programmable processor chip, especially designed for effective processing of video signals. The architecture is described in terms of three hierarchical levels: the system level, describing how video signal processing tasks are realized on the basis of only one type of processor chip; the chip level, describing the modular architecture with the number of modules on the chip to be tuned to the available technology; and the module level, describing the various processing elements, how they communicate, and how they are controlled by so-called cyclo-static programs. For program development, software support tools have been designed, in a top-down mapping trajectory, that start at the signal-flow-graph level and result in the program code for the processor(s).< >
Total citations
1989199019911992199319941995199619971998411231
Scholar articles
RJ Sluyter, PJ Snijder, H Dijkstra, CM Huizer… - International Conference on Acoustics, Speech, and …, 1989