Authors
Yuanjie Huang, Paolo Ienne, Olivier Temam, Yunji Chen, Chengyong Wu
Publication date
2013/2/11
Book
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Pages
171-180
Description
Vital technology trends such as voltage scaling and homogeneous multicore scaling have reached their limits and architects turn to alternate computing paradigms, such as heterogeneous and domain-specialized solutions. Coarse-Grain Reconfigurable Arrays (CGRAs) promise the performance of massively spatial computing while offering interesting trade-offs of flexibility versus energy efficiency. Yet, configuring and scheduling execution for CGRAs generally runs into the classic difficulties that have hampered Very-Long Instruction Word (VLIW) architectures: efficient schedules are difficult to generate, especially for applications with complex control flow and data structures, and they are inherently static - thus, in adapted to variable-latency components (such as the read ports of caches). Over the years, VLIWs have been relegated to important but specific application domains where such issues are more under the …
Total citations
201320142015201620172018201920202021202220232024191367114388114
Scholar articles
Y Huang, P Ienne, O Temam, Y Chen, C Wu - Proceedings of the ACM/SIGDA international …, 2013