Authors
David Powell, Jean Arlat, Ljerka Beus-Dukic, Andrea Bondavalli, Paolo Coppola, Alessandro Fantechi, Eric Jenn, Christophe Rabéjac, Andrew Wellings
Publication date
1999/6
Journal
IEEE Transactions on Parallel and Distributed Systems
Volume
10
Issue
6
Pages
580-599
Publisher
IEEE
Description
The development and validation of fault-tolerant computers for critical real-time applications are currently both costly and time consuming. Often, the underlying technology is out-of-date by the time the computers are ready for deployment. Obsolescence can become a chronic problem when the systems in which they are embedded have lifetimes of several decades. This paper gives an overview of the work carried out in a project that is tackling the issues of cost and rapid obsolescence by defining a generic fault-tolerant computer architecture based essentially on commercial off-the-shelf (COTS) components (both processor hardware boards and real-time operating systems). The architecture uses a limited number of specific, but generic, hardware and software components to implement an architecture that can be configured along three dimensions: redundant channels, redundant lanes, and integrity levels. The …
Total citations
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Scholar articles
D Powell, J Arlat, L Beus-Dukic, A Bondavalli… - IEEE Transactions on Parallel and Distributed Systems, 1999