Khurram Waheed

Khurram Waheed

NXP Semiconductor
Verified email at nxp.com
Cited by 2546
system architecture RF systems ADPLL signal processing WPAN
Sebastian Höppner

Sebastian Höppner

TU Dresden
Verified email at tu-dresden.de
Cited by 1512
CMOS SoC ADPLL PLL NoC
Yongsun Lee (이용선)

Yongsun Lee (이용선)

Memory division, Samsung Electronics
Verified email at samsung.com
Cited by 746
High-speed interface Analog/Mixed-Signal Circuits RF PLL ADPLL
Ximenes, A. R.

Ximenes, AR

Research Scientist, at Facebook Reality Labs
Verified email at ieee.org
Cited by 582
LiDAR TOF ADPLL
Chanwoong Hwang

Chanwoong Hwang

Korea Advanced Institute of Science and Technology
Verified email at kaist.ac.kr
Cited by 163
Analog/Mixed-Signal Circuits Frequency generatator Fractional-N PLL ADPLL
Amir Bozorg

Amir Bozorg

Research Fellow at University College Dublin
Verified email at ucd.ie
Cited by 145
Sub-THz/Millimeter-wave Transceivers Radar DT-Receiver ADPLL
Raleigh Smith

Raleigh Smith

Carleton University
Verified email at cmail.carleton.ca
Cited by 34
SERDES mixed-signal design RF design ADPLL high-speed frequency synthesis
Nabeel Ahmad

Nabeel Ahmad

PhD Researcher at ICLAB, SungkyunKwan University
Verified email at skku.edu
Cited by 30
ADPLL High Speed Interfaces ADC Mixed signal ICs
Lantao Wang

Lantao Wang

Ph.D. student, Chair of Integrated Analog Circuits and RF Systems, RWTH Aachen …
Verified email at ias.rwth-aachen.de
Cited by 21
Analog integrated circuits oscillators ADPLL
Xu Wang

Xu Wang

University College Dublin
Verified email at ucd.ie
Cited by 21
frequency synthesis PLL ADPLL fractional-N digital delta-sigma modulation
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