Jeffrey Goeders

Jeffrey Goeders

Brigham Young University
Verified email at byu.edu
Cited by 1420
FPGAs High-Level Synthesis Debug Compilers Security
Eddie Hung

Eddie Hung

Adjunct Professor, University of British Columbia
Verified email at ece.ubc.ca
Cited by 749
Field Programmable Gate Array FPGA CAD Debug Routing
Nabil Badereddine

Nabil Badereddine

Intel Corporation
Verified email at intel.com
Cited by 304
Yield Debug Product Engineering DFT Data Analysis
Juan Manuel Martinez Caamaño

Juan Manuel Martinez Caamaño

Compiler Engineer at Advanced Micro Devices
Verified email at amd.com
Cited by 192
compilation progam optimization program analysis obfuscation debug
Saghir A Shaikh

Saghir A Shaikh

Intel Corp.
Verified email at intel.com
Cited by 154
Design for Test and Debug Yield Analysis Analog and RF Testing Diagnostics Debug
Swetha Mettala Gilla

Swetha Mettala Gilla

TD Module Engineer, Intel Corporation, Asynchronous Research Center at Portland State …
Verified email at intel.com
Cited by 97
cmos design VLSI testing debug verification data analysis
Siamack Beigmohammadi

Siamack Beigmohammadi

Eindhoven University of Technology
Verified email at tue.nl
Cited by 15
ASIC FPGA Deep Neural Networks Validation Debug