Profiles

Peng Li

PostDoc of Computer Science, UCLA

Verified email at cs.ucla.edu

Cited by 3509

High-Level Synthesis Reconfigurable Architecture Computer Architecture

Lilian Bossuet

Professor, University of Lyon, Saint-Etienne - Laboratoire Hubert Curien - CNRS

Verified email at univ-st-etienne.fr

Cited by 3211

Embedded System Security Reconfigurable Architecture FPGA Security Hardware Security IP Protection

Masanori Hashimoto

Kyoto University

Verified email at i.kyoto-u.ac.jp

Cited by 3175

VLSI EDA Reconfigurable architecture

Guojie Luo

Peking University

Verified email at pku.edu.cn

Cited by 2375

Electronic Design Automation Reconfigurable Architecture

Kyle Rupnow

ASIC Architect, Google

Verified email at google.com

Cited by 1746

Computer Architecture Embedded Systems Reconfigurable Architecture Graphics Processor Architecture High Level Synthesis

Serge Weber

professeur d'électronique, Université de Lorraine, Nancy

Verified email at univ-lorraine.fr

Cited by 1107

reconfigurable architecture FPGA Arc fault detection Neuromorphic circuits Reconfigurable NoC

François Charot

INRIA Rennes

Verified email at inria.fr

Cited by 679

ASIP design computer architecture reconfigurable architecture

Qiaoyi Liu

Stanford University

Verified email at stanford.edu

Cited by 600

Compiler Computer Architecture Reconfigurable Architecture

Soufien GDAIM

University of Monastir. Assistant Professor of computer science at the Higher Institute of …

Verified email at isima.rnu.tn

Cited by 540

Reconfigurable architecture Real-time control Fuzzy logic Neural network

olivier muller

Associate professor of computer science, Grenoble Institut of Technology, Ensimag/TIMA …

Verified email at imag.fr

Cited by 488

Reconfigurable architecture MPSoC CAD

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