| A comprehensive timing model for accurate frequency tuning in dataflow circuits C Rizzi, A Guerrieri, P Ienne, L Josipović 2022 32nd International Conference on Field-Programmable Logic and …, 2022 | 7 | 2022 |
| An iterative method for mapping-aware frequency regulation in dataflow circuits C Rizzi, A Guerrieri, L Josipović 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 4 | 2023 |
| An out-of-order load-store queue for spatial computing L Josipovic, P Brisk, P Ienne ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-19, 2017 | 44 | 2017 |
| Area Analysis K Tu, X Tang, C Yu, L Josipović, Z Chu FPGA EDA: Design Principles and Implementation, 79-82, 2024 | | 2024 |
| ASAP 2023 S Ainsworth, J Anderson, K Atasu, J Bakos, V Beltran, D Bertozzi, ... | | |
| Automatic inductive invariant generation for scalable dataflow circuit verification J Xu, L Josipović 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 2 | 2023 |
| Bitstream Configuration K Tu, X Tang, C Yu, L Josipović, Z Chu FPGA EDA: Design Principles and Implementation, 207-221, 2024 | | 2024 |
| Buffer placement and sizing for high-performance dataflow circuits L Josipović, S Sheikhha, A Guerrieri, P Ienne, J Cortadella ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (1), 1-32, 2021 | 41 | 2021 |
| CAS Society News 2020 (vol 21, pg 78, 2021) L Josipovic, A Guerrieri, P Ienne IEEE CIRCUITS AND SYSTEMS MAGAZINE 21 (2), 128-128, 2021 | | 2021 |
| Combining dynamic & static scheduling in high-level synthesis J Cheng, L Josipovic, GA Constantinides, P Ienne, J Wickerson Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 54 | 2020 |
| DASS: Combining dynamic & static scheduling in high-level synthesis J Cheng, L Josipović, GA Constantinides, P Ienne, J Wickerson IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 14 | 2021 |
| Design (Application Design) Modeling K Tu, X Tang, C Yu, L Josipović, Z Chu FPGA EDA: Design Principles and Implementation, 49-61, 2024 | | 2024 |
| Device (Chip Design) Modeling K Tu, X Tang, C Yu, L Josipović, Z Chu FPGA EDA: Design Principles and Implementation, 25-47, 2024 | | 2024 |
| Dimitris Agiakatsikas University of Piraeus Research Centre (UPRC) Hideharu Amano Keio University Jason Anderson University of Toronto Kota Ando Hokkaido University D Andrews, J Babb, D Bailey, J Bakos, J Becker, P Beckett, M Berekovic, ... | | |
| Dynamic inter-block scheduling for HLS J Cheng, L Josipović, GA Constantinides, J Wickerson 2022 32nd International Conference on Field-Programmable Logic and …, 2022 | 8 | 2022 |
| Dynamically scheduled high-level synthesis L Josipović, R Ghosal, P Ienne Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018 | 122 | 2018 |
| DynaRapid: From C to FPGA in a Few Seconds A Guerrieri, S Guha, L Josipovic, P Ienne Proceedings of the 2024 ACM/SIGDA International Symposium on Field …, 2024 | | 2024 |
| Eliminating excessive dynamism of dataflow circuits using model checking J Xu, E Murphy, J Cortadella, L Josipovic Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023 | 4 | 2023 |
| Enriching C-based High-Level Synthesis with parallel pattern templates L Josipovic, N George, P Ienne 2016 International Conference on Field-Programmable Technology (FPT), 177-180, 2016 | 11 | 2016 |
| FPGA Architecture: Principles and Progression L Josipovic, A Guerrieri, P Ienne IEEE CIRCUITS AND SYSTEMS MAGAZINE 21 (2), 97-118, 2021 | | 2021 |
Paolo IenneProfessor, EPFLVerified email at epfl.ch