| System and method for integrated circuit planar netlist interpretation B Lippmann, A Junghanns US Patent 7,937,678, 2011 | 67 | 2011 |
| Integrated flow for reverse engineering of nanoscale technologies B Lippmann, M Werner, N Unverricht, A Singla, P Egger, A Dübotzky, ... Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 39 | 2019 |
| Verification of physical designs using an integrated reverse engineering flow for nanoscale technologies B Lippmann, N Unverricht, A Singla, M Ludwig, M Werner, P Egger, ... Integration 71, 11-29, 2020 | 36 | 2020 |
| Reverse engineering of cryptographic cores by structural interpretation through graph analysis M Werner, B Lippmann, J Baehr, H Gräb 2018 IEEE 3rd International Verification and Security Workshop (IVSW), 13-18, 2018 | 31 | 2018 |
| Semiconductor device and production process B Lippmann, S Wallstab, G Schmid, R Leuschner US Patent 7,122,899, 2006 | 18 | 2006 |
| Device and method for processing a program code FJ Bruecklmayr, B Lippmann US Patent 7,707,631, 2010 | 15 | 2010 |
| Vital: Verifying trojan-free physical layouts through hardware reverse engineering M Ludwig, AC Bette, B Lippmann 2021 IEEE Physical Assurance and Inspection of Electronics (PAINE), 1-8, 2021 | 14 | 2021 |
| Chip and method for manufacturing a chip T Kuenemund, B Lippmann US Patent 9,385,726, 2016 | 10 | 2016 |
| Apparatus for storing and wirelessly transmitting data M Janke, B Lippmann US Patent 7,911,355, 2011 | 10 | 2011 |
| Verification of physical chip layouts using gdsii design data A Singla, B Lippmann, H Graeb 2019 IEEE 4th International Verification and Security Workshop (IVSW), 55-60, 2019 | 9 | 2019 |
| Physical and functional reverse engineering challenges for advanced semiconductor solutions B Lippmann, AC Bette, M Ludwig, J Mutter, J Baehr, A Hepp, H Gieser, ... 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 796-801, 2022 | 7 | 2022 |
| Recovery of 2D and 3D layout information through an advanced image stitching algorithm using scanning electron microscope images A Singla, B Lippmann, H Graeb 2020 25th international conference on pattern recognition (ICPR), 3860-3867, 2021 | 6 | 2021 |
| Enabling trust for advanced semiconductor solutions based on physical layout verification M Ludwig, B Lippmann, N Unverricht Intelligent System Solutions for Auto Mobility and Beyond: Advanced …, 2021 | 4 | 2021 |
| Benchmarking Domain Specific Processors: A Case Study of Evaluating a Smart Card Processor Design Z Wang, T Wild, S Rüping, B Lippmann 2008 IEEE Computer Society Annual Symposium on VLSI, 16-21, 2008 | 3 | 2008 |
| Counterfeit detection by semiconductor process technology inspection M Ludwig, AC Bette, B Lippmann, G Sigl 2023 IEEE European Test Symposium (ETS), 1-4, 2023 | 2 | 2023 |
| Generating Trust in Hardware through Physical Inspection B Lippmann, M Ludwig, H Gieser Embedded Artificial Intelligence, 45-59, 2023 | 2 | 2023 |
| VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations B Lippmann, J Hatsch, S Seidl, D Houdeau, NP Subrahmanyam, ... 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 2 | 2023 |
| AI in Semiconductor Industry C De Luca, B Lippmann, W Schober, S Al-Baddai, G Pelz, A Rojko, ... Artificial Intelligence for Digitising Industry–Applications, 105-112, 2022 | 2 | 2022 |
| Semiconductor package authentication feature S Dankowski, T Gutheit, B Lippmann US Patent 11,063,000, 2021 | 2 | 2021 |
| Layout-Only Hardware Trojans: Attack Vectors and a Non-Golden Model Reverse Engineering-Based Counterstrategy M Ludwig, AC Bette, B Lippmann International Symposium for Testing and Failure Analysis 84741, 329-338, 2023 | 1 | 2023 |
Matthias LudwigInfineon Technologies AGVerified email at infineon.com
