Hardware/software co-design of an accelerator for FV homomorphic encryption scheme using Karatsuba algorithm V Migliore, MM Real, V Lapotre, A Tisserand, C Fontaine, G Gogniat IEEE Transactions on Computers 67 (3), 335-347, 2016 | 45 | 2016 |
A high-speed accelerator for homomorphic encryption using the karatsuba algorithm V Migliore, C Seguin, MM Real, V Lapotre, A Tisserand, C Fontaine, ... ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-17, 2017 | 29 | 2017 |
Physical side-channel attacks on embedded neural networks: A survey M Méndez Real, R Salvador Applied Sciences 11 (15), 6790, 2021 | 27 | 2021 |
Dynamic spatially isolated secure zones for NoC-based many-core accelerators MM Real, P Wehner, V Migliore, V Lapotre, D Göhringert, G Gogniat 2016 11th International Symposium on Reconfigurable Communication-centric …, 2016 | 15 | 2016 |
MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multi and Many-core architectures MM Real, P Wehner, J Rettkowski, V Migliore, V Lapotre, D Göhringer, ... 2016 International Conference on Embedded Computer Systems: Architectures …, 2016 | 7 | 2016 |
Application deployment strategies for spatial isolation on many-core accelerators MM Real, P Wehner, V Lapotre, D Göhringer, G Gogniat ACM Transactions on Embedded Computing Systems (TECS) 17 (2), 1-31, 2018 | 6 | 2018 |
0–1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems S Yang, S Le Nours, MM Real, S Pillement Journal of Systems Architecture 116, 102035, 2021 | 5 | 2021 |
ALMOS many-core operating system extension with new secure-enable mechanisms for dynamic creation of secure zones MM Real, V Migliore, V Lapotre, G Gogniat 2016 24th Euromicro International Conference on Parallel, Distributed, and …, 2016 | 5 | 2016 |
Exploration of polynomial multiplication algorithms for homomorphic encryption schemes V Migliore, MM Real, V Lapotre, A Tisserand, C Fontaine, G Gogniat 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 5 | 2015 |
Towards malicious exploitation of energy management mechanisms S Noubir, MM Real, S Pillement 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 4 | 2020 |
Mapping and frequency joint optimization for energy efficient execution of multiple applications on multicore systems S Yang, S lez Nours, M mendez Real, S Pillement 2019 Conference on Design and Architectures for Signal and Image Processing …, 2019 | 4 | 2019 |
Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm V Migliore, MM Real, V Lapotre, A Tisserand, C Fontaine, G Gogniat 2016 International Conference on Field-Programmable Technology (FPT), 209-212, 2016 | 4 | 2016 |
Spatial isolation against logical cache-based side-channel attacks in many-core architectures MM Real Université de Bretagne Sud, 2017 | 3 | 2017 |
You Only Get One-Shot: Eavesdropping Input Images to Neural Network by Spying SoC-FPGA Internal Bus MM Thu, M Méndez Real, M Pelcat, P Besnier Proceedings of the 18th International Conference on Availability …, 2023 | 2 | 2023 |
MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multicore and Many-core architectures MM Real, V Migliore, V Lapotre, G Gogniat, P Wehner, J Rettkowski, ... 4rd Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES …, 2016 | 2 | 2016 |
Trusted computing using enhanced manycore architectures with cryptoprocessors CM López, MM Real, L Bossuet, G Gogniat, V Fischer, A Baganne 22nd IFIP/IEEE International Conference on Very Large Scale Integration …, 2014 | 2 | 2014 |
Extending Multicore Architectures with Cryptoptocessors and Parallel Cryptography C Mancillas, MM Réal, L Bossuet, G Gogniat, V Fischer, A Baganne Colloque national du GDR SOC-SIP, 2014 | 2 | 2014 |
Bus Electrocardiogram: Vulnerability of SoC-FPGA Internal AXI Bus to Electromagnetic Side-Channel Analysis MM Thu, MM Real, M Pelcat, P Besnier 2023 International Symposium on Electromagnetic Compatibility–EMC Europe, 1-6, 2023 | 1 | 2023 |
Secure deployment in trusted many-core architectures MM Real, A Baganne, G Gogniat Proceedings of the 21st IEEE International conference on Electronics …, 2014 | 1 | 2014 |
RISC-V processor enhanced with a dynamic micro-decoder unit J Pottier, T Nieddu, BL Gal, S Pillement, MM Real arXiv preprint arXiv:2406.14999, 2024 | | 2024 |