| Automation of analog IC layout: Challenges and solutions J Scheible, J Lienig Proceedings of the 2015 Symposium on International Symposium on Physical …, 2015 | 90 | 2015 |
| Fundamentals of layout design for electronic circuits J Lienig, J Scheible Springer 130, 151-153, 2020 | 38 | 2020 |
| Using drones for art and exergaming J Scheible, M Funk, KC Pucihar, M Kljun, M Lochrie, P Egglestone, P Skrlj IEEE Pervasive Computing 16 (1), 48-56, 2017 | 27 | 2017 |
| Lithography hotspots detection using deep learning V Borisov, J Scheible 2018 15th international conference on synthesis, modeling, analysis and …, 2018 | 24 | 2018 |
| Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs G Jerke, J Lienig, J Scheible Proceedings of the 41st Annual Design Automation Conference, 181-184, 2004 | 24 | 2004 |
| Heat Generation in Bond Wires CC Jung, J Scheible IEEE Transactions on Components, Packaging and Manufacturing Technology 5 …, 2015 | 16 | 2015 |
| PCDS: A New Approach for the Development of Circuit Generators in Analog IC Design D Marolt, M Greif, J Scheible, G Jerke Austrian Workshop on Microelectronics (Austrochip) 22, 5-10, 2014 | 16 | 2014 |
| The need and opportunities of electromigration-aware integrated circuit design S Bigalke, J Lienig, G Jerke, J Scheible, R Jancke 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 14 | 2018 |
| SWARM: a self-organization approach for layout automation in analog IC design D Marolt, J Scheible, G Jerke, V Marolt International journal of electronics and electrical engineering 4 (5), 374-385, 2016 | 14 | 2016 |
| A generic topology selection method for analog circuits with embedded circuit sizing demonstrated on the OTA example A Gerlach, J Scheible, T Rosahl, FT Eitrich Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 12 | 2017 |
| Optimized is not always optimal-the dilemma of analog design automation J Scheible Proceedings of the 2022 International Symposium on Physical Design, 151-158, 2022 | 11 | 2022 |
| Die Lösung des feldtheoretischen Viermedienproblems ebener Schichten J Scheible Archiv für Elektrotechnik 75 (1), 9-17, 1991 | 10 | 1991 |
| Deep reinforcement learning for analog circuit sizing with an electrical design space and sparse rewards Y Uhlmann, M Essich, L Bramlage, J Scheible, C Curio Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 21-26, 2022 | 8 | 2022 |
| Expert Design Plan: a toolbox for procedural automation of analog integrated circuit design M Schweikardt, J Scheible 2022 18th International Conference on Synthesis, Modeling, Analysis and …, 2022 | 8 | 2022 |
| Der Bond-Rechner–ein Werkzeug zur Dimensionierung von Bonddrähten A Gerlach, D Marolt, J Scheible Zuverlässigkeit und Entwurf: 6. GMM-GI-ITG-Fachtagung vom 25. bis 27 …, 2012 | 8 | 2012 |
| The Application of layout module generators upon circuit structure recognition D Marolt, J Scheible, G Jerke Proc. CDNLive! EMEA 2011, 2011 | 8 | 2011 |
| Procedural-and reinforcement-learning-based automation methods for analog integrated circuit sizing in the electrical design space Y Uhlmann, M Brunner, L Bramlage, J Scheible, C Curio Electronics 12 (2), 302, 2023 | 7 | 2023 |
| Improvement of simulation-based analog circuit sizing using design-space transformation M Schweikardt, J Scheible SMACD/PRIME 2021; International Conference on SMACD and 16th Conference on …, 2021 | 7 | 2021 |
| A generic procedural generator for sizing of analog integrated circuits M Schweikardt, Y Uhlmann, F Leber, J Scheible, H Habal 2019 15th Conference on Ph. D Research in Microelectronics and Electronics …, 2019 | 7 | 2019 |
| Research on data augmentation for lithography hotspot detection using deep learning V Borisov, J Scheible 34th European Mask and Lithography Conference 10775, 204-209, 2018 | 7 | 2018 |
Jens LienigTU DresdenVerified email at ifte.de