| Application of HfSiON as a gate dielectric material MR Visokay, JJ Chambers, ALP Rotondaro, A Shanware, L Colombo Applied Physics Letters 80 (17), 3183-3185, 2002 | 559 | 2002 |
| Annealing of high-k dielectric materials ALP Rotondaro, MR Visokay, L Colombo US Patent 6,544,906, 2003 | 528 | 2003 |
| Process for manufacturing dual work function metal gates in a microelectronics device L Colombo, JJ Chambers, MR Visokay US Patent 7,229,873, 2007 | 503 | 2007 |
| Direct formation of ordered CoPt and FePt compound thin films by sputtering MR Visokay, R Sinclair Applied Physics Letters 66 (13), 1692-1694, 1995 | 307 | 1995 |
| Integrated circuit and method TS Moise, G Xing, M Visokay, JF Gaynor, SR Gilbert, F Celii, ... US Patent 6,211,035, 2001 | 267 | 2001 |
| Epitaxial PtFe (001) thin films on MgO (001) with perpendicular magnetic anisotropy BM Lairson, MR Visokay, R Sinclair, BM Clemens Applied physics letters 62 (6), 639-641, 1993 | 225 | 1993 |
| Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing MR Visokay, ALP Rotondaro, L Colombo US Patent 6,696,332, 2004 | 218 | 2004 |
| Metal gate MOS transistors and methods for making the same M Visokay, L Colombo, JJ Chambers US Patent 6,936,508, 2005 | 174 | 2005 |
| Epitaxial Pt (001), Pt (110), and Pt (111) films on MgO (001), MgO (110), MgO (111), and Al2O3 (0001) BM Lairson, MR Visokay, R Sinclair, S Hagstrom, BM Clemens Applied physics letters 61 (12), 1390-1392, 1992 | 168 | 1992 |
| Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers VK Agarwal, G Derderian, GS Sandhu, WM Li, M Visokay, C Basceri, ... US Patent 6,833,576, 2004 | 151 | 2004 |
| Advanced CMOS transistors with a novel HfSiON gate dielectric ALP Rotondaro, MR Visokay, JJ Chambers, A Shanware, R Khamankar, ... 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002 | 146 | 2002 |
| Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers VK Agarwal, G Derderian, GS Sandhu, WM Li, M Visokay, C Basceri, ... US Patent 6,596,583, 2003 | 143 | 2003 |
| Multiple work function gates ALP Rotondaro, MR Visokay US Patent 6,835,639, 2004 | 139 | 2004 |
| Gate structure and method MR Visokay, ALP Rotondaro, L Colombo US Patent 7,105,891, 2006 | 136 | 2006 |
| MOS transistor gates with thin lower metal silicide and methods for making the same RW Murto, L Colombo, MR Visokay US Patent 7,045,456, 2006 | 130 | 2006 |
| Integrated circuit and method TS Moise, G Xing, M Visokay, JF Gaynor, SR Gilbert, F Celii, ... US Patent 6,444,542, 2002 | 115 | 2002 |
| High temperature interface layer growth for high-k gate dielectric L Colombo, JJ Chambers, ALP Rotondaro, MR Visokay US Patent 6,852,645, 2005 | 114 | 2005 |
| Anneal sequence for high-κ film property optimization MR Visokay, L Colombo, ALP Rotondaro US Patent 6,821,873, 2004 | 112 | 2004 |
| Method for fabricating transistor gate structures and gate dielectrics thereof MR Visokay, L Colombo, JJ Chambers, ALP Rotondaro, H Bu US Patent 7,135,361, 2006 | 98 | 2006 |
| Gate structure and method MR Visokay, ALP Rotondaro, L Colombo US Patent 6,797,599, 2004 | 97 | 2004 |
