| d2-LBDR: Distance-driven routing to handle permanent failures in 2D mesh NoCs R Bishnoi, V Laxmi, MS Gaur, J Flich 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 800-805, 2015 | 25 | 2015 |
| Distributed adaptive routing for spidergon NoC R Bishnoi, P Kumar, V Laxmi, MS Gaur, A Sikka 18th International Symposium on VLSI Design and Test, 1-6, 2014 | 12 | 2014 |
| TRACK: An algorithm for fault-tolerant, dynamic and scalable 2D mesh network-on-chip routing reconfiguration A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi Integration 72, 92-110, 2020 | 10 | 2020 |
| S2DIO: an extended scalable 2D mesh network-on-chip routing reconfiguration for efficient bypass of link failures A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi The Journal of Supercomputing 75, 6855-6881, 2019 | 8 | 2019 |
| Hybrid fault tolerant routing algorithm in NoC R Bishnoi Perspectives in Science 8, 586-588, 2016 | 7 | 2016 |
| Resilient routing implementation in 2D mesh NoC R Bishnoi, V Laxmi, MS Gaur, M Zwolinski Microelectronics Reliability 56, 189-201, 2016 | 5 | 2016 |
| Performance-enhanced-LBDR for 2D mesh network-on-chip A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi International Symposium on VLSI Design and Test, 313-323, 2017 | 2 | 2017 |
| A Brief Comment on “A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs”[ACM Transactions on Embedded Computing Systems 12 (2013) Article 106] R Bishnoi, V Laxmi, MS Gaur, J Flich, F Trivino ACM Transactions on Embedded Computing Systems (TECS) 14 (1), 1-9, 2015 | 2 | 2015 |
| Fault tolerant routing implementation mechanism for irregular 2d mesh nocs R Bishnoi, V Laxmi, MS Gaur, RHB Ramlee, M Zwolinski 2014 NORCHIP, 1-4, 2014 | 2 | 2014 |
| σnLBDR: generic congestion handling routing implementation for two‐dimensional mesh network‐on‐chip N Gupta, A Sharma, V Laxmi, MS Gaur, M Zwolinski, R Bishnoi IET Computers & Digital Techniques 10 (5), 226-232, 2016 | 1 | 2016 |
| CERI: Cost-Effective Routing Implementation Technique for Network-on-Chip R Bishnoi, V Laxmi, MS Gaur, RHB Ramlee, M Zwolinski 2015 28th International Conference on VLSI Design, 59-64, 2015 | 1 | 2015 |
| Fault Aware Dynamic Adaptive Routing Using LBDR R Bishnoi, V Laxmi, MS Gaur, M Baskota VLSI Design and Test: 17th International Symposium, VDAT 2013, Jaipur, India …, 2013 | | 2013 |