| A fractional-N divider-less phase-locked loop with a subsampling phase detector WS Chang, PC Huang, TC Lee IEEE Journal of Solid-State Circuits 49 (12), 2964-2975, 2014 | 80 | 2014 |
| 21.2 A 2.3 GHz fractional-N dividerless phase-locked loop with− 112dBc/Hz in-band phase noise PC Huang, WS Chang, TC Lee 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 51 | 2014 |
| A 56.5–72.2 GHz Transformer-Injection Miller Frequency Divider in 0.13CMOS WS Chang, KW Tan, SSH Hsu IEEE Microwave and Wireless Components Letters 20 (7), 393-395, 2010 | 15 | 2010 |
| A 5 GHz Fractional-ADC-Based Digital Phase-Locked Loops With −243.8 dB FOM WS Chang, TC Lee IEEE Transactions on Circuits and Systems I: Regular Papers 63 (11), 1845-1853, 2016 | 13 | 2016 |
| An energy-efficient self-charged crystal oscillator with a quadrature-phase shifter technique WS Chang, DE Jhou, YH Yang, TC Lee 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 53-56, 2017 | 5 | 2017 |
| A 5.12-GHz fractional-N frequency synthesizer with an LC-VCO-based MDLL DE Jhou, WS Chang, TC Lee 2017 Symposium on VLSI Circuits, C132-C133, 2017 | 2 | 2017 |
| Integrated circuit capable of repeatedly using current WS Chang, SH Hsu US Patent App. 12/885,494, 2011 | 2 | 2011 |
| A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth JA Jheng, WS Chang, TC Lee Technical Papers of 2014 International Symposium on VLSI Design, Automation …, 2014 | 1 | 2014 |
| A 2× 25Gb/s 20mW serializing transmitter with 2.5: 1 multiplexers in 40nm technology BJ Lin, WS Chang, TC Lee 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 1-4, 2016 | | 2016 |
| 應用於高速鎖相迴路之微波除頻器與振盪器 WS Chang 清華大學電子工程研究所學位論文 2010, 1-52, 2010 | | 2010 |
Shawn S. H. HsuNational Tsing Hua UniversityVerified email at ee.nthu.edu.tw
Shawn S. H. HsuNational Tsing Hua UniversityVerified email at ee.nthu.edu.tw