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Fahad Bin Muslim
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Efficient FPGA implementation of OpenCL high-performance computing applications via high-level synthesis
FB Muslim, L Ma, M Roozmeh, L Lavagno
IEEE Access 5, 2747-2762, 2017
1312017
LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow
A Qamar, FB Muslim, J Iqbal, L Lavagno
Microprocessors and Microsystems 50, 26-38, 2017
242017
High-level synthesis for semi-global matching: Is the juice worth the squeeze?
A Qamar, FB Muslim, F Gregoretti, L Lavagno, MT Lazarescu
IEEE Access 5, 8419-8432, 2016
232016
Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL.
FB Muslim, A Demian, L Ma, L Lavagno, A Qamar
FedCSIS (Position Papers), 141-145, 2016
222016
Low power methodology for an ASIC design flow based on high-level synthesis
FB Muslim, A Qamar, L Lavagno
2015 23rd International Conference on Software, Telecommunications and …, 2015
182015
High performance and low power Monte Carlo methods to option pricing models via high level design and synthesis
L Ma, FB Muslim, L Lavagno
2016 European Modelling Symposium (EMS), 157-162, 2016
132016
Analysis and implementation of the semi-global matching 3d vision algorithm using code transformations and high-level synthesis
A Qamar, FB Muslim, L Lavagno
2015 IEEE 81st Vehicular Technology Conference (VTC Spring), 1-5, 2015
112015
Line-interactive transformerless uninterruptible power supply (UPS) with a fuel cell as the primary source
M Iftikhar, M Aamir, A Waqar, Naila, FB Muslim, I Alam
Energies 11 (3), 542, 2018
102018
FracTCAM: fracturable LUTRAM-based TCAM emulation on Xilinx FPGAs
A Zahir, SK Khattak, A Ullah, P Reviriego, FB Muslim, W Ahmad
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (12 …, 2020
92020
Power-Intent Systolic Array Using Modified Parallel Multiplier for Machine Learning Acceleration
K Inayat, FB Muslim, J Iqbal, SAH Mohsan, HK Alkahtani, S. M. Mostafa
Sensors 23 (9), 4297, 2023
82023
VR-ZYCAP: a versatile resourse-level ICAP controller for ZYNQ SOC
B Sultana, A Ullah, AA Malik, A Zahir, P Reviriego, FB Muslim, N Ullah, ...
Electronics 10 (8), 899, 2021
72021
Simulations and experimental validation of one cycle controlled nine-level inverter using FPGA
A Ul-Haq, M Jalal, M Aamir, C Cecati, FB Muslim, AA Raja, J Iqbal
Computers & Electrical Engineering 88, 106885, 2020
52020
Implementation of symbol timing recovery for estimation of clock skew
SMU Hashmi, M Hussain, FB Muslim, K Inayat, SO Hwang
International Journal of Internet Technology and Secured Transactions 11 (3 …, 2021
42021
Robust anti-windup control strategy for uncertain nonlinear system with time delays
M Hussain, FB Muslim, O Khan, NU Saqib
Arabian Journal for Science and Engineering 47 (3), 3847-3860, 2022
22022
Performance evaluation of a multicarrier MIMO system based on DFT-precoding and subcarrier mapping
FB Muslim, M Hussain, U Hashmi, A Aneesullah, M Aamir, A Zahir
Facta Universitatis, Series: Electronics and Energetics 35 (2), 253-268, 2022
12022
Securing the IoT ecosystem: ASIC-based hardware realization of Ascon lightweight cipher
S Khan, K Inayat, FB Muslim, YA Shah, M Atif Ur Rehman, A Khalid, ...
International Journal of Information Security, 1-12, 2024
2024
The Future of Secure FANETs: A Deep Dive into Advanced Signcryption
N Bari, FB Muslim, ZH Abbas, G Abbas
Global Conference on Wireless & Optical Technologies 2024 (GCWOT'24), 2024
2024
FPGA-assisted design space exploration of parameterized AI accelerators: A Quickloop approach
K Inayat, FB Muslim, M Tayyeb, J Chung
Journal of Systems Architecture, 2024
2024
LPCHISEL: Automatic power intent generation for a chisel-based ASIC design
FB Muslim, K Inayat, S Khan
Computers and Electrical Engineering 115, 109115, 2024
2024
A Lightweight Public Key Encryption Scheme with Equality Test for Distributed Healthcare System
K Inayat, FB Muslim, S Khan, I Kim, SO Hwang
2023
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