A new congestion-driven placement algorithm based on cell inflation W Hou, H Yu, X Hong, Y Cai, W Wu, J Gu, WH Kao Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 87 | 2001 |
Automatic register banking for low-power clock trees W Hou, D Liu, PH Ho 2009 10th International Symposium on Quality Electronic Design, 647-652, 2009 | 80 | 2009 |
GPU friendly fast Poisson solver for structured power grid network analysis J Shi, Y Cai, W Hou, L Ma, SXD Tan, PH Ho, X Wang Proceedings of the 46th Annual Design Automation Conference, 178-183, 2009 | 61 | 2009 |
Method and apparatus for proximate placement of sequential cells W Hou, PH Ho US Patent 8,099,702, 2012 | 41 | 2012 |
A path-based timing-driven quadratic placement algorithm W Hou, X Hong, W Wu, Y Cai Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003 | 16 | 2003 |
FaSa: A fast and stable quadratic placement algorithm W Hou, X Hong, W Wu, Y Cai Journal of Computer Science and Technology 18 (3), 318-324, 2003 | 14 | 2003 |
Combining clustering and partitioning in quadratic placement Y Lu, X Hong, W Hou, W Wu, Y Cai 2003 IEEE International Symposium on Circuits and Systems (ISCAS) 4, IV-IV, 2003 | 10 | 2003 |
Relaxed hierarchical power/ground grid analysis Y Cai, Z Pan, SXD Tan, X Hong, W Hou, L Wu Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 9 | 2005 |
Standard-cell based data-path placement utilizing regularity CYC Yang, XHX Hong, YCY Cai, WHW Hou, TJT Jing, WWW Wu 2003 5th International Conference on ASIC Proceedings 1, 97-100, 2003 | 7 | 2003 |
Techniques for effective distributed physical synthesis FYC Mang, W Hou, PH Ho Proceedings of the 44th annual Design Automation Conference, 859-864, 2007 | 5 | 2007 |
Clock tree synthesis for low power and low susceptibility to variation Y Cheon, PH Ho, W Hou, Y Liu, D Wang 2007 7th International Conference on ASIC, 1333-1333, 2007 | 2 | 2007 |
A standard-cell placement algorithm of optimizing multiple objects W Hou, X Hong, W Wu, Y Cai 2002 IEEE International Symposium on Circuits and Systems (ISCAS) 2, II-II, 2002 | 1 | 2002 |
An efficient partitioning method for very large-scale standard cell placement with pre-designed macros YLY Lu, XHX Hong, CYC Yang, WHW Hou, YMY Ma 2003 5th International Conference on ASIC Proceedings 1, 270-273, 2003 | | 2003 |
A multi-step standard-cell placement algorithm of optimizing timing and congestion behavior W Hou, X Hong, W Wu, Y Cai Science in China Series F: Information Sciences 45, 310-320, 2002 | | 2002 |