Mapping for maximum performance on FPGA DSP blocks B Ronak, SA Fahmy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 77 | 2015 |
Is fpga useful for hash joins? X Chen, Y Chen, R Bajaj, J He, B He, WF Wong, D Chen CIDR, 2020 | 50 | 2020 |
On-the-fly parallel data shuffling for graph processing on OpenCL-based FPGAs X Chen, R Bajaj, Y Chen, J He, B He, WF Wong, D Chen 2019 29th International Conference on Field Programmable Logic and …, 2019 | 34 | 2019 |
Multipumping flexible DSP blocks for resource reduction on Xilinx FPGAs B Ronak, SA Fahmy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 22 | 2016 |
Evaluating the efficiency of DSP block synthesis inference from flow graphs B Ronak, SA Fahmy 22nd International Conference on Field Programmable Logic and Applications …, 2012 | 22 | 2012 |
Efficient mapping of mathematical expressions into DSP blocks B Ronak, SA Fahmy 2014 24th International Conference on Field Programmable Logic and …, 2014 | 16 | 2014 |
A novel, low-power array multiplier architecture R Bajaj, S Chhabra, S Veeramachaneni, MB Srinivas 2009 9th International Symposium on Communications and Information …, 2009 | 14 | 2009 |
Minimizing DSP block usage through multi-pumping B Ronak, SA Fahmy 2015 International Conference on Field Programmable Technology (FPT), 184-187, 2015 | 12 | 2015 |
Improved resource sharing for FPGA DSP blocks B Ronak, SA Fahmy 2016 26th International Conference on Field Programmable Logic and …, 2016 | 9 | 2016 |
Exploiting DSP block capabilities in FPGA high level design flows R Bajaj Nanyang Technological University, Singapore, 2016 | 7 | 2016 |
Accelerating hash computations through efficient instruction-set customisation M Sivanesan, A Chattopadhyay, R Bajaj 2018 31st International Conference on VLSI Design and 2018 17th …, 2018 | 4 | 2018 |
Features Based on Fourier-Bessel Expansion for Application of Speaker Identification System S Chhabra, R Bajaj, RB Pachori, RN Biswas | 4* | |
Experiments in mapping expressions to DSP blocks R Bajaj, SA Fahmy 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014 | 3 | 2014 |
Is FPGA Useful for Hash Joins? Exploring Hash Joins on Coupled CPU-FPGA Architecture X Chen, Y Chen, R Bajaj, J He, B He, WF Wong, D Chen 10th Annual Conference on Innovative Data Systems Research, CIDR 2020, 2020 | 1 | 2020 |
Initiation interval aware resource sharing for FPGA DSP blocks R Bajaj, SA Fahmy 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom …, 2016 | 1 | 2016 |