| A novel sensing circuit for deep submicron spin transfer torque MRAM (STT-MRAM) J Kim, K Ryu, SH Kang, SO Jung IEEE Transactions on very large scale integration (VLSI) systems 20 (1), 181-186, 2010 | 119 | 2010 |
| Comparative study of various latch-type sense amplifiers T Na, SH Woo, J Kim, H Jeong, SO Jung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 425-429, 2013 | 103 | 2013 |
| Power-gated 9T SRAM cell for low-energy operation TW Oh, H Jeong, K Kang, J Park, Y Yang, SO Jung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3 …, 2016 | 102 | 2016 |
| Invalid write prevention for STT-MRAM array K Ryu, J Kim, SO Jung, SH Kang US Patent 8,432,727, 2013 | 92 | 2013 |
| Adaptive voltage scaling for an electronics device M Elgebaly, KZ Malik, LG Chua-Eoan, SO Jung US Patent 7,417,482, 2008 | 89 | 2008 |
| One-sided schmitt-trigger-based 9T SRAM cell for near-threshold operation K Cho, J Park, TW Oh, SO Jung IEEE Transactions on Circuits and Systems I: Regular Papers 67 (5), 1551-1561, 2020 | 88 | 2020 |
| STT-MRAM sensing: a review T Na, SH Kang, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 68 (1), 12-18, 2020 | 76 | 2020 |
| A magnetic tunnel junction based zero standby leakage current retention flip-flop K Ryu, J Kim, J Jung, JP Kim, SH Kang, SO Jung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (11 …, 2011 | 75 | 2011 |
| Process-variation-calibrated multiphase delay locked loop with a loop-embedded duty cycle corrector K Ryu, DH Jung, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 61 (1), 1-5, 2013 | 73 | 2013 |
| Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size SO Jung, MH Sani, SH Kang, SS Yoon US Patent 8,144,509, 2012 | 72 | 2012 |
| A 10T-4MTJ nonvolatile ternary CAM cell for reliable search operation and a compact area B Song, T Na, JP Kim, SH Kang, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 64 (6), 700-704, 2016 | 63 | 2016 |
| Numerical estimation of yield in sub-100-nm SRAM design using Monte Carlo simulation H Nho, SS Yoon, SS Wong, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 55 (9), 907-911, 2008 | 61 | 2008 |
| Single data line sensing scheme for TCCT-based memory cells SS Yoon, JM Han, SO Jung US Patent 6,903,987, 2005 | 56 | 2005 |
| Reference-scheme study and novel reference scheme for deep submicrometer STT-RAM T Na, J Kim, JP Kim, SH Kang, SO Jung IEEE Transactions on Circuits and Systems I: Regular Papers 61 (12), 3376-3385, 2014 | 54 | 2014 |
| Skew-tolerant high-speed (STHS) domino logic SO Jung, SM Yoo, KW Kim, SM Kang ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 54 | 2001 |
| A DLL with dual edge triggered phase detector for fast lock and low jitter clock generator K Ryu, DH Jung, SO Jung IEEE Transactions on Circuits and Systems I: Regular Papers 59 (9), 1860-1870, 2012 | 53 | 2012 |
| Spin transfer torque magnetoresistive random access memory and design methods SO Jung, SH Kang, SS Yoon, MH Sani US Patent 7,764,537, 2010 | 53 | 2010 |
| Single-ended 9T SRAM cell for near-threshold voltage operation with enhanced read performance in 22-nm FinFET technology Y Yang, J Park, SC Song, J Wang, G Yeap, SO Jung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (11 …, 2014 | 52 | 2014 |
| Offset-canceling current-sampling sense amplifier for resistive nonvolatile memory in 65 nm CMOS T Na, B Song, JP Kim, SH Kang, SO Jung IEEE Journal of Solid-State Circuits 52 (2), 496-504, 2016 | 51 | 2016 |
| Bit line control and sense amplification for TCCT-based memory cells SS Yoon, SO Jung US Patent 6,958,931, 2005 | 50 | 2005 |
