| Bumped semiconductor device having a trench for stress relief JH Kleffner, AB Mistry US Patent 5,943,597, 1999 | 165 | 1999 |
| Semiconductor package with multiple sides having package contacts AB Mistry, JM Haas, DO Kiffe, JH Kleffner, DR Wilde US Patent 6,815,254, 2004 | 156 | 2004 |
| Method and apparatus for stress relief in solder bump formation on a semiconductor device AB Mistry, V Sarihan, JH Kleffner, GF Carney US Patent 6,077,726, 2000 | 145 | 2000 |
| Package on Package warpage-impact on surface mount yields and board level reliability N Vijayaragavan, F Carson, A Mistry 2008 58th Electronic Components and Technology Conference, 389-396, 2008 | 53 | 2008 |
| Digital and RF system and method therefor J Gehman, BH Christensen, JH Kleffner, AB Mistry, D Patten, J Rohde, ... US Patent 7,479,407, 2009 | 50 | 2009 |
| Method and apparatus for manufacturing an interconnect structure AB Mistry, R Chowdhury, SK Pozder, DA Hagen, RG Cole, ... US Patent 6,429,531, 2002 | 37 | 2002 |
| Stackable molded packages and methods of making the same A Mistry, M Mangrum, D Patten, J Phou, Z Tran US Patent App. 11/311,579, 2007 | 36 | 2007 |
| Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections E Cheng, AB Mistry, DT Patten US Patent 7,262,615, 2007 | 29 | 2007 |
| Stackable molded packages and methods of making the same AB Mistry, MA Mangrum, DT Patten, J Phou, Z Tran US Patent 8,044,494, 2011 | 26 | 2011 |
| Stackable molded packages and methods of making the same A Mistry, M Mangrum, D Patten, J Phou, Z Tran US Patent App. 11/968,873, 2008 | 25 | 2008 |
| Reliability evaluation of probe-before-bump technology Q Tan, C Beddingfield, A Mistry Twenty Fourth IEEE/CPMT International Electronics Manufacturing Technology …, 1999 | 23 | 1999 |
| Characterization of low alpha emissivity system on electroplated solder bumps A Mistry, S Lee, C Enman, B Carroll, D Mitchell, V Mathew, D Weeks, ... 2000 Proceedings. 50th Electronic Components and Technology Conference (Cat …, 2000 | 7 | 2000 |
| Failure mechanisms of flip chip DCA assembly using eutectic solder Q Tan, R Cole, A Mistry, C Beddingfield 2000 Proceedings. 50th Electronic Components and Technology Conference (Cat …, 2000 | 7 | 2000 |
| Zincation characterization for electroless Ni/Au UBM of solder bumping technology Q Tan, C Beddingfield, A Mistry, V Mathew Twenty Third IEEE/CPMT International Electronics Manufacturing Technology …, 1998 | 7 | 1998 |
| Evaluation of eutectic solder bump interconnect technology C Beddingfield, Q Tan, A Mistry Twenty Fourth IEEE/CPMT International Electronics Manufacturing Technology …, 1999 | 5 | 1999 |
| Eutectic bump evaluation with various passivation and polyimide structures [flip chip interconnects] A Mistry, K Ananthanarayanan, D Mitchell, Q Tan, C Beddingfield, ... Twenty Fourth IEEE/CPMT International Electronics Manufacturing Technology …, 1999 | 4 | 1999 |
| Performance of evaporated and plated bumps on organic substrates A Mistry, J Czarnowski, C Beddingfield, Q Tan, J Guajardo, K Rhyner, ... Twenty Third IEEE/CPMT International Electronics Manufacturing Technology …, 1998 | 4 | 1998 |
| E-3 Solder Bump Integrity and Joinability A Mistry, A Sparkman, LM Higgins, C Beddingfield Surface Mount International Proceedings, 309-313, 1997 | 2 | 1997 |
| Development and characterization of an alpha particle low emissivity measurement system for semiconductor industry S Lee, B Carroll, C Enman, V Mathew, B Thomson, D Weeks, M Tucker PROCEEDINGS-SPIE THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING, 455-460, 2000 | 1 | 2000 |
| Method and apparatus for manufacturing an interconnect structure AB Mistry, R Chowdhury, SK Pozder, DA Hagen, RG Cole, ... | | 2001 |