Double pattern EDA solutions for 32nm HP and beyond GE Bailey, A Tritchkov, JW Park, L Hong, V Wiaux, E Hendrickx, ... Design for Manufacturability through Design-Process Integration 6521, 476-487, 2007 | 94 | 2007 |
Data preparation for multiple mask printing JW Park, EY Sahouria US Patent 7,802,226, 2010 | 31 | 2010 |
Litho-Aware Machine Learning for Hotspot Detection JW Park, A Torres, X Song IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 24 | 2018 |
Selective shielding for multiple exposure masks JW Park US Patent 7,966,585, 2011 | 22 | 2011 |
Assessing the impact of real world manufacturing lithography variations on post-OPC CD control JL Sturtevant, J Word, P LaCour, JW Park, D Smith Design and Process Integration for Microelectronic Manufacturing III 5756 …, 2005 | 22 | 2005 |
Geometric Pattern Matching Using Edge Driven Dissected Rectangles and Vector Space JW Park, R Todd, X Song IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 12 | 2016 |
Hotspot detection based on litho-aware machine learning JW Park, JAT Robles US Patent 11,113,445, 2021 | 9 | 2021 |
A novel algorithm for automatic arrays detection in a layout M Shafee, JW Park, A Aslyan, A Torres, K Madkour, W ElManhawy Design for Manufacturability through Design-Process Integration VII 8684 …, 2013 | 8 | 2013 |
System and method for layout analysis using point of interest patterns and properties SHRM Mousa, JW Park, M White US Patent 11,003,828, 2021 | 2 | 2021 |
Pattern matching using edge-driven dissected rectangles JW Park, RA Todd US Patent 10,311,199, 2019 | 1 | 2019 |
Selective shielding for multiple exposure masks JW Park US Patent 8,209,642, 2012 | 1 | 2012 |
Duplicate circuit section identification and processing for optical proximity correction (OPC) processes in electronic design automation (EDA) applications JW Park, S Kim US Patent 11,886,788, 2024 | | 2024 |