Data processing module and video processing system incorporating same RJ Sluijter, CM Huizer, H Dijkstra, GA Slavenburg US Patent 5,103,311, 1992 | 149 | 1992 |
System with plurality of processing elememts each generates respective instruction based upon portions of individual word received from a crossbar switch RJ Sluijter, CM Huizer, H Dijkstra US Patent 5,055,997, 1991 | 143 | 1991 |
Power dissipation analysis of CMOS VLSI circuits by means of switch-level simulation CM Huizer ESSCIRC'90: Sixteenth European Solid-State Circuits Conference 1, 61-64, 1990 | 80 | 1990 |
A general-purpose programmable video signal processor AHM Van Roermund, PJ Snijder, H Dijkstra, CG Hemeryck, CM Huizer, ... IEEE Transactions on Consumer electronics 35 (3), 249-258, 1989 | 67 | 1989 |
Flip-flop circuit having transfer gate delay HJM Veendrick, AAJM van den Elshout, CM Huizer US Patent 5,264,738, 1993 | 61 | 1993 |
Coupling network for a data processor, including a series connection of a cross-bar switch and an array of silos RJ Sluijter, HDL Hollmann, CM Huizer, H Dijkstra US Patent 5,280,620, 1994 | 59 | 1994 |
Method of receiving compressed video signals using a latency buffer during pause and resume CM Huizer, LMWM Karel, F Bosveld, PJ De Visser US Patent 5,873,022, 1999 | 53 | 1999 |
Adaptive electronic buffer system having consistent operating characteristics CM Huizer US Patent 4,691,127, 1987 | 50 | 1987 |
Method and arrangement for transmitting an interactive audiovisual program CM Huizer, PB Kaars, BAG Van Luijt, F Bosveld US Patent 5,875,303, 1999 | 39 | 1999 |
Method of transmitting and receiving compressed television signals CM Huizer, LMWM Karel, F Bosveld, PJ De Visser US Patent 6,751,802, 2004 | 33 | 2004 |
Delay circuit for delaying differential signals includes separately controllable first and second load and clamp circuits for effecting different delay times CM Huizer US Patent 5,477,182, 1995 | 33 | 1995 |
Rendering device and arrangement C Huizer US Patent App. 10/082,857, 2002 | 32 | 2002 |
A programmable 1400 MOPS video signal processor CM Huizer, K Baker, K Mehtani, J De Block, H Dijkstra, PJ Hynes, ... 1989 Proceedings of the IEEE Custom Integrated Circuits Conference, 24.3/1 …, 1989 | 32 | 1989 |
Apparatus and methods for improving timing recovery of a system clock CM Huizer US Patent 5,612,981, 1997 | 28 | 1997 |
Digital phase-locked loop CM Huizer, L Doornhein US Patent 5,459,766, 1995 | 23 | 1995 |
A programmable video signal processor RJ Sluyter, PJ Snijder, H Dijkstra, CM Huizer, AHM van Roermund International Conference on Acoustics, Speech, and Signal Processing,, 2476-2479, 1989 | 12 | 1989 |
Optimized application of submicron CMOS for VLSI logic-A systems oriented view on design and technology CM Huizer Proc. IEEE Custom Integrated Circuits Conf, 391-395, 1987 | 11 | 1987 |
A general-purpose video signal processor: architecture and programming H Dijkstra, G Essink, AJM Hafkamp, H den Hengst, CM Huizer, ... Proceedings 1989 IEEE International Conference on Computer Design: VLSI in …, 1989 | 10 | 1989 |
Data processing system buffering sequential data for cyclically recurrent delay times, memory address generator for use in such system H Dijkstra, CM Huizer, RJ Sluijter US Patent 5,109,488, 1992 | 6 | 1992 |
Macro-Testability and the VSP R Mehtani, K Baker, CM Huizer, PJ Hynes, J van Beers Proceedings. International Test Conference 1990, 739-748, 1990 | 5 | 1990 |